Synopsys PrimeSim HSPICE with WaveView 2026.03 Win/Linux – Industry ‘Gold Standard’ Circuit Simulator for High-Performance IC and System Design

Synopsys PrimeSim HSPICE is the industry’s ‘gold standard’ for accurate circuit simulation and offers foundry-certified MOS device models with state-of-the-art simulation and analysis algorithms . With extensive usage in signal integrity simulation, cell and memory characterization, and analog mixed-signal IC design, PrimeSim HSPICE is the industry’s most popular, trusted and comprehensive circuit simulator .

The 2026.03 version represents the latest release of this proven platform, fully integrated with the PrimeWave Design Environment for a modern, seamless simulation experience, and the WaveView waveform viewer for in-depth analysis of simulation results . It is available for both Windows and Linux operating systems and is cloud-ready, allowing engineers to run, save, and restore simulations anywhere, anytime.

Primary Users

PrimeSim HSPICE with WaveView 2026.03 is designed for chip design engineers, signal integrity specialists, memory designers, and analog/mixed-signal IC verification teams who require the highest level of simulation accuracy for complex electronic systems. It serves professionals who:

  • Perform chip/package/board/backplane signal integrity simulation to ensure robust high-speed designs

  • Conduct cell and memory characterization for foundational IP development and library creation

  • Design and verify analog mixed-signal ICs requiring foundry-certified model accuracy

  • Analyze jitter and phase noise in high-speed SerDes and memory interfaces (e.g., DDR5, PCIe) 

  • Develop automotive and safety-critical applications requiring ISO 26262 compliance (ASIL-D)

Key Features & Capabilities

Foundry-Certified Models and Accuracy

  • Industry-Standard Device Models: Provides a comprehensive set of models ranging from CMC-standardized models (BSIM, PSP, HiSIM) for advanced nodes to proprietary models (HVMOS, TFT) for specialized applications 

  • Foundry Certification: Collaborates with leading foundries such as TSMC and Samsung Foundry to ensure timely and accurate validation of HSPICE model parameters for advanced node CMOS, FinFET, and FDSOI processes 

  • Unified Device Model Library: Ensures correlation between all PrimeSim simulation engines (PrimeSim SPICE, PrimeSim Pro, PrimeSim XA) 

Advanced Signal Integrity (SI) Analysis

  • Chip/Package/Board/Backplane SI: Comprehensive simulation capabilities with support for IBIS, IBIS-AMI, and encrypted SPICE netlists 

  • StatEye Analysis: Cutting-edge statistical analysis enables accurate ultra-low BER simulation in a single run, widely used for DDR (single-ended) and PCIe/USB (differential) designs 

  • Transient and Linear Analysis: Includes noise analysis with specialized modes for jitter decomposition, phase noise simulation (PSS + PNOISE), and noise-aware eye diagram generation 

Analog and Mixed-Signal Verification

  • ISO 26262 TCL-1 ASIL D Certified: Suitable for the development of safety-related elements in automotive applications up to ASIL-D, in compliance with the PrimeSim HSPICE Functional Safety Manual 

  • Comprehensive Analysis Suite: Supports high-frequency noise analysis, efficient S-parameter handling, and advanced periodic/non-periodic time-domain and frequency-domain analysis 

Unified Workflow and Ecosystem

  • PrimeSim Continuum Integration: Seamlessly integrated with other simulation engines (PrimeSim SPICE, PrimeSim Pro, PrimeSim XA) within the PrimeSim Continuum unified workflow 

  • PrimeWave Design Environment: Modern, open design environment for consistent simulation setup and analysis across all engines 

  • WaveView Integration: Robust waveform viewer for eye diagram analysis and results visualization 

What’s New in PrimeSim HSPICE 2026.03

The 2026.03 release is a key version for the integration with the broader Synopsys and Lumerical ecosystems:

Ecosystem and Interoperability Enhancements

  • Photonic Verilog-A Compatibility: Supports integration with photonic Verilog-A compact models generated by Ansys Lumerical CML Compiler, enabling full electro-optical co-simulations within Synopsys OptoCompiler 

  • Platform Support: Confirmed compatibility with Linux operating systems for integrated photonic workflows 

Continued Performance and Productivity

  • Cloud Readiness: Optimized and enabled for leading public cloud platforms, allowing engineers to leverage scalable compute resources 

  • Enhanced Noise Analysis: Continued refinement of advanced noise analysis capabilities for high-speed SerDes and memory interface design